#ifndef __SN8P2308__H
#define __SN8P2308__H

void _ClearWatchDogTimer(void);
void _ClrRAM(void);

#define NOP(X)  	__asm{	_NOP X }
#define LOG(X)  	__asm{	LOG CNameToAsmLabel(X) }
sfr	L = 0x80;
sfr	H = 0x81;
sfr	R = 0x82;
sfr	Z = 0x83;
sfr	Y = 0x84;
sfr	PFLAG = 0x86;
sbit	FZ = 0x86:0;
sbit	FDC = 0x86:1;
sbit	FC = 0x86:2;
sbit	FLVD24 = 0x86:4;
sbit	FLVD36 = 0x86:5;
sbit	FNPD = 0x86:6;
sbit	FNT0 = 0x86:7;
sfr	RBANK = 0x87;
sbit	FRBNKS0 = 0x87:0;
sbit	FRBNKS1 = 0x87:1;
sbit	FRBNKS2 = 0x87:2;
sbit	FRBNKS3 = 0x87:3;
sfr	VLCD = 0x89;
sbit	FVLCDCP = 0x89:0;
sbit	FVLCD0 = 0x89:1;
sbit	FVLCD1 = 0x89:2;
sbit	FVLCD2 = 0x89:3;
sbit	FCPCK0 = 0x89:4;
sbit	FCPCK1 = 0x89:5;
sfr	T1M = 0xA0;
sbit	FT1IRQ = 0xA0:0;
sbit	FT1IEN = 0xA0:1;
sbit	FT1CKS = 0xA0:3;
sbit	FT1RATE0 = 0xA0:4;
sbit	FT1RATE1 = 0xA0:5;
sbit	FT1RATE2 = 0xA0:6;
sbit	FT1ENB = 0xA0:7;
sfr	T1CL = 0xA1;
sfr	T1CH = 0xA2;
sfr	RFCM = 0xA3;
sbit	FRFCENB = 0xA3:0;
sbit	FRFCH0 = 0xA3:1;
sbit	FRFCH1 = 0xA3:2;
sbit	FRFCOUT = 0xA3:7;
sfr	P0M = 0xB8;
sbit	FP00M = 0xB8:0;
sbit	FP01M = 0xB8:1;
sbit	FP03M = 0xB8:3;
sfr	PEDGE = 0xbf;
sbit	FT1G0 = 0xbf:0;
sbit	FT1G1 = 0xbf:1;
sbit	FP00G1 = 0xbf:4;
sbit	FP00G0 = 0xbf:3;
sfr	P1W = 0XC0;
sbit	FP10W = 0XC0:0;
sbit	FP11W = 0XC0:1;
sbit	FP12W = 0XC0:2;
sbit	FP13W = 0XC0:3;
sbit	FP14W = 0XC0:4;
sbit	FP15W = 0XC0:5;
sbit	FP16W = 0XC0:6;
sfr	P1M = 0xc1;
sbit	FP10M = 0xc1:0;
sbit	FP11M = 0xc1:1;
sbit	FP12M = 0xc1:2;
sbit	FP13M = 0xc1:3;
sbit	FP14M = 0xc1:4;
sbit	FP15M = 0xc1:5;
sbit	FP16M = 0xc1:6;
sfr	P3M = 0xc3;
sbit	FP37M = 0xc3:7;
sbit	FP36M = 0xc3:6;
sbit	FP35M = 0xc3:5;
sbit	FP34M = 0xc3:4;
sbit	FP33M = 0xc3:3;
sbit	FP32M = 0xc3:2;
sbit	FP31M = 0xc3:1;
sbit	FP30M = 0xc3:0;
sfr	P5M = 0xc5;
sbit	FP55M = 0xc5:5;
sbit	FP54M = 0xc5:4;
sbit	FP53M = 0xc5:3;
sbit	FP52M = 0xc5:2;
sbit	FP51M = 0xc5:1;
sbit	FP50M = 0xc5:0;
sfr	INTRQ = 0xc8;
sbit	FTC0IRQ = 0xc8:5;
sbit	FT0IRQ = 0xc8:4;
sbit	FP00IRQ = 0xc8:0;
sfr	INTEN = 0xc9;
sbit	FTC0IEN = 0xc9:5;
sbit	FT0IEN = 0xc9:4;
sbit	FP00IEN = 0xc9:0;
sfr	OSCM = 0xca;
sbit	FCPUM1 = 0xca:4;
sbit	FCPUM0 = 0xca:3;
sbit	FCLKMD = 0xca:2;
sbit	FSTPHX = 0xca:1;
sfr	LCDM = 0XCB;
sbit	FLCDENB = 0XCB:0;
sbit	FBIAS = 0XCB:1;
sbit	FP3SEG = 0XCB:2;
sbit	FRCLK = 0XCB:3;
sfr	WDTR = 0xcc;
sfr	TC0R = 0xcd;
sfr	PCL = 0xce;
sfr	PCH = 0xcf;
sfr	P0 = 0xd0;
sbit	FP03 = 0xd0:3;
sbit	FP02 = 0xd0:2;
sbit	FP01 = 0xd0:1;
sbit	FP00 = 0xd0:0;
sfr	P1 = 0xd1;
sbit	FP16 = 0xd1:6;
sbit	FP15 = 0xd1:5;
sbit	FP14 = 0xd1:4;
sbit	FP13 = 0xd1:3;
sbit	FP12 = 0xd1:2;
sbit	FP11 = 0xd1:1;
sbit	FP10 = 0xd1:0;
sfr	P3 = 0xd3;
sbit	FP37 = 0xd3:7;
sbit	FP36 = 0xd3:6;
sbit	FP35 = 0xd3:5;
sbit	FP34 = 0xd3:4;
sbit	FP33 = 0xd3:3;
sbit	FP32 = 0xd3:2;
sbit	FP31 = 0xd3:1;
sbit	FP30 = 0xd3:0;
sfr	P5 = 0xd5;
sbit	FP55 = 0xd5:5;
sbit	FP54 = 0xd5:4;
sbit	FP53 = 0xd5:3;
sbit	FP52 = 0xd5:2;
sbit	FP51 = 0xd5:1;
sbit	FP50 = 0xd5:0;
sfr	T0M = 0xd8;
sbit	FT0TB = 0xd8:0;
sbit	FTC0X8 = 0xd8:2;
sbit	FT0RATE0 = 0xd8:4;
sbit	FT0RATE1 = 0xd8:5;
sbit	FT0RATE2 = 0xd8:6;
sbit	FT0ENB = 0xd8:7;
sfr	T0C = 0XD9;
sfr	TC0M = 0xda;
sbit	FTC0ENB = 0xda:7;
sbit	FTC0RATE2 = 0xda:6;
sbit	FTC0RATE1 = 0xda:5;
sbit	FTC0RATE0 = 0xda:4;
sbit	FTC0CKS = 0xda:3;
sbit	FALOAD0 = 0xda:2;
sbit	FTC0OUT = 0xda:1;
sbit	FPWM0OUT = 0xda:0;
sfr	TC0C = 0xdb;
sfr	STKP = 0xdf;
sbit	FGIE = 0xdf:7;
sbit	FSTKPB2 = 0xdf:2;
sbit	FSTKPB1 = 0xdf:1;
sbit	FSTKPB0 = 0xdf:0;
sfr	P0UR = 0xe0;
sbit	FP03R = 0xe0:3;
sbit	FP01R = 0xe0:1;
sbit	FP00R = 0xe0:0;
sfr	P1UR = 0xe1;
sbit	FP16R = 0xe1:6;
sbit	FP15R = 0xe1:5;
sbit	FP14R = 0xe1:4;
sbit	FP13R = 0xe1:3;
sbit	FP12R = 0xe1:2;
sbit	FP11R = 0xe1:1;
sbit	FP10R = 0xe1:0;
sfr	P3UR = 0xe3;
sbit	FP37R = 0xe3:7;
sbit	FP36R = 0xe3:6;
sbit	FP35R = 0xe3:5;
sbit	FP34R = 0xe3:4;
sbit	FP33R = 0xe3:3;
sbit	FP32R = 0xe3:2;
sbit	FP31R = 0xe3:1;
sbit	FP30R = 0xe3:0;
sfr	P5UR = 0xe5;
sbit	FP56R = 0xe5:6;
sbit	FP55R = 0xe5:5;
sbit	FP54R = 0xe5:4;
sbit	FP53R = 0xe5:3;
sbit	FP52R = 0xe5:2;
sbit	FP51R = 0xe5:1;
sbit	FP50R = 0xe5:0;
sfr	_HL = 0xe6;
sfr	DP0X = 0xe6;
sfr	_YZ = 0xe7;
sfr	DP1X = 0xe7;
sfr	NCREG = 0xef;
sfr	STK7L = 0xf0;
sfr	STK7H = 0xf1;
sfr	STK6L = 0xf2;
sfr	STK6H = 0xf3;
sfr	STK5L = 0xf4;
sfr	STK5H = 0xf5;
sfr	STK4L = 0xf6;
sfr	STK4H = 0xf7;
sfr	STK3L = 0xf8;
sfr	STK3H = 0xf9;
sfr	STK2L = 0xfa;
sfr	STK2H = 0xfb;
sfr	STK1L = 0xfc;
sfr	STK1H = 0xfd;
sfr	STK0L = 0xfe;
sfr	STK0H = 0xff;
#define SLEEPMODE __asm{SleepMode}
#define GREENMODE __asm{GreenMode}
#define SLOWMODE __asm{SlowMode}
#define SLOW2NORMAL __asm{Slow2Normal}
#endif
