#ifndef __SN8P2949__H
#define __SN8P2949__H
struct specialRegister{
	unsigned bit0:1;
	unsigned bit1:1;
	unsigned bit2:1;
	unsigned bit3:1;
	unsigned bit4:1;
	unsigned bit5:1;
	unsigned bit6:1;
	unsigned bit7:1;
};


void _ClearWatchDogTimer(void);
void _ClrRAM(void);

#define NOP(X)  	__asm{	_NOP X }
#define LOG(X)  	__asm{	LOG CNameToAsmLabel(X) }
#define	L	(*((__RAM unsigned int*)0x80))
#define	H	(*((__RAM unsigned int*)0x81))
#define	R	(*((__RAM unsigned int*)0x82))
#define	Z	(*((__RAM unsigned int*)0x83))
#define	Y	(*((__RAM unsigned int*)0x84))
#define	X	(*((__RAM unsigned int*)0x85))
#define	PFLAG	(*((__RAM unsigned int*)0x86))
#define	FC	((*((__RAM struct specialRegister *)0x86)).bit2)
#define	FDC	((*((__RAM struct specialRegister *)0x86)).bit1)
#define	FZ	((*((__RAM struct specialRegister *)0x86)).bit0)
#define	RBANK	(*((__RAM unsigned int*)0x87))
#define	FRBNKS3	((*((__RAM struct specialRegister *)0x87)).bit3)
#define	FRBNKS2	((*((__RAM struct specialRegister *)0x87)).bit2)
#define	FRBNKS1	((*((__RAM struct specialRegister *)0x87)).bit1)
#define	FRBNKS0	((*((__RAM struct specialRegister *)0x87)).bit0)
#define	LCDM1	(*((__RAM unsigned int*)0x89))
#define	FLCDREF1	((*((__RAM struct specialRegister *)0x89)).bit7)
#define	FLCDREF0	((*((__RAM struct specialRegister *)0x89)).bit6)
#define	FLCDBNK	((*((__RAM struct specialRegister *)0x89)).bit5)
#define	FLCDTYPE	((*((__RAM struct specialRegister *)0x89)).bit4)
#define	FLCDENB	((*((__RAM struct specialRegister *)0x89)).bit3)
#define	FLCDBIAS	((*((__RAM struct specialRegister *)0x89)).bit2)
#define	FLCDRATE	((*((__RAM struct specialRegister *)0x89)).bit1)
#define	FLCDCLK	((*((__RAM struct specialRegister *)0x89)).bit0)
#define	LCDM2	(*((__RAM unsigned int*)0x8A))
#define	FBGM	((*((__RAM struct specialRegister *)0x8A)).bit6)
#define	FLCDPENB	((*((__RAM struct specialRegister *)0x8A)).bit5)
#define	FVPPINTL	((*((__RAM struct specialRegister *)0x8A)).bit4)
#define	FVCP3	((*((__RAM struct specialRegister *)0x8A)).bit3)
#define	FVCP2	((*((__RAM struct specialRegister *)0x8A)).bit2)
#define	FVCP1	((*((__RAM struct specialRegister *)0x8A)).bit1)
#define	FVCP0	((*((__RAM struct specialRegister *)0x8A)).bit0)
#define	VREG	(*((__RAM unsigned int*)0x90))
#define	FBGRENB	((*((__RAM struct specialRegister *)0x90)).bit7)
#define	FACMSEL	((*((__RAM struct specialRegister *)0x90)).bit6)
#define	FACMENB	((*((__RAM struct specialRegister *)0x90)).bit5)
#define	FAVESEL	((*((__RAM struct specialRegister *)0x90)).bit4)
#define	FAVENB	((*((__RAM struct specialRegister *)0x90)).bit3)
#define	FAVDDRSEL	((*((__RAM struct specialRegister *)0x90)).bit2)
#define	FAVDDRENB	((*((__RAM struct specialRegister *)0x90)).bit1)
#define	AMPM1	(*((__RAM unsigned int*)0x91))
#define	FCHS3	((*((__RAM struct specialRegister *)0x91)).bit7)
#define	FCHS2	((*((__RAM struct specialRegister *)0x91)).bit6)
#define	FCHS1	((*((__RAM struct specialRegister *)0x91)).bit5)
#define	FCHS0	((*((__RAM struct specialRegister *)0x91)).bit4)
#define	FGS2	((*((__RAM struct specialRegister *)0x91)).bit3)
#define	FGS1	((*((__RAM struct specialRegister *)0x91)).bit2)
#define	FGS0	((*((__RAM struct specialRegister *)0x91)).bit1)
#define	FAMPENB	((*((__RAM struct specialRegister *)0x91)).bit0)
#define	AMPM2	(*((__RAM unsigned int*)0x92))
#define	FINRENB	((*((__RAM struct specialRegister *)0x92)).bit7)
#define	FGX	((*((__RAM struct specialRegister *)0x92)).bit6)
#define	FGR	((*((__RAM struct specialRegister *)0x92)).bit5)
#define	FAMPCKS1	((*((__RAM struct specialRegister *)0x92)).bit4)
#define	FAMPCKS0	((*((__RAM struct specialRegister *)0x92)).bit3)
#define	FPCHPENB	((*((__RAM struct specialRegister *)0x92)).bit2)
#define	FDTENB	((*((__RAM struct specialRegister *)0x92)).bit1)
#define	FDTSEL	((*((__RAM struct specialRegister *)0x92)).bit0)
#define	ADCM1	(*((__RAM unsigned int*)0x93))
#define	FRVS	((*((__RAM struct specialRegister *)0x93)).bit7)
#define	FIRVS3	((*((__RAM struct specialRegister *)0x93)).bit6)
#define	FIRVS2	((*((__RAM struct specialRegister *)0x93)).bit5)
#define	FIRVS1	((*((__RAM struct specialRegister *)0x93)).bit4)
#define	FIRVS0	((*((__RAM struct specialRegister *)0x93)).bit3)
#define	FADGN1	((*((__RAM struct specialRegister *)0x93)).bit2)
#define	FADGN0	((*((__RAM struct specialRegister *)0x93)).bit1)
#define	FADCENB	((*((__RAM struct specialRegister *)0x93)).bit0)
#define	ADCM2	(*((__RAM unsigned int*)0X94))
#define	FOSR2	((*((__RAM struct specialRegister *)0X94)).bit6)
#define	FOSR1	((*((__RAM struct specialRegister *)0X94)).bit5)
#define	FOSR0	((*((__RAM struct specialRegister *)0X94)).bit4)
#define	FOFSEL1	((*((__RAM struct specialRegister *)0X94)).bit2)
#define	FOFSEL0	((*((__RAM struct specialRegister *)0X94)).bit1)
#define	FDRDY	((*((__RAM struct specialRegister *)0X94)).bit0)
#define	ADCM3	(*((__RAM unsigned int*)0X95))
#define	FACHPENB	((*((__RAM struct specialRegister *)0X95)).bit4)
#define	FADCKINV	((*((__RAM struct specialRegister *)0X95)).bit3)
#define	FADCKS2	((*((__RAM struct specialRegister *)0X95)).bit2)
#define	FADCKS1	((*((__RAM struct specialRegister *)0X95)).bit1)
#define	FADCKS0	((*((__RAM struct specialRegister *)0X95)).bit0)
#define	LBTM	(*((__RAM unsigned int*)0x96))
#define	FP51IO	((*((__RAM struct specialRegister *)0x96)).bit6)
#define	FLBTSEL3	((*((__RAM struct specialRegister *)0x96)).bit5)
#define	FLBTSEL2	((*((__RAM struct specialRegister *)0x96)).bit4)
#define	FLBTSEL1	((*((__RAM struct specialRegister *)0x96)).bit3)
#define	FLBTSEL0	((*((__RAM struct specialRegister *)0x96)).bit2)
#define	FLBTO	((*((__RAM struct specialRegister *)0x96)).bit1)
#define	FLBTENB	((*((__RAM struct specialRegister *)0x96)).bit0)
#define	ADCDH	(*((__RAM unsigned int*)0x97))
#define	ADCDM	(*((__RAM unsigned int*)0x98))
#define	ADCDL	(*((__RAM unsigned int*)0x99))
#define	LEDCPM	(*((__RAM unsigned int*)0x9A))
#define	FVLEDENB	((*((__RAM struct specialRegister *)0x9A)).bit4)
#define	FCPCKS2	((*((__RAM struct specialRegister *)0x9A)).bit3)
#define	FCPCKS1	((*((__RAM struct specialRegister *)0x9A)).bit2)
#define	FCPCKS0	((*((__RAM struct specialRegister *)0x9A)).bit1)
#define	FCPRENB	((*((__RAM struct specialRegister *)0x9A)).bit0)
#define	ROMADRH	(*((__RAM unsigned int*)0XA0))
#define	FVPPCHK	((*((__RAM struct specialRegister *)0XA0)).bit7)
#define	FROMADR12	((*((__RAM struct specialRegister *)0XA0)).bit4)
#define	FROMADR11	((*((__RAM struct specialRegister *)0XA0)).bit3)
#define	FROMADR10	((*((__RAM struct specialRegister *)0XA0)).bit2)
#define	FROMADR9	((*((__RAM struct specialRegister *)0XA0)).bit1)
#define	FROMADR8	((*((__RAM struct specialRegister *)0XA0)).bit0)
#define	ROMADRL	(*((__RAM unsigned int*)0XA1))
#define	FROMADR7	((*((__RAM struct specialRegister *)0XA1)).bit7)
#define	FROMADR6	((*((__RAM struct specialRegister *)0XA1)).bit6)
#define	FROMADR5	((*((__RAM struct specialRegister *)0XA1)).bit5)
#define	FROMADR4	((*((__RAM struct specialRegister *)0XA1)).bit4)
#define	FROMADR3	((*((__RAM struct specialRegister *)0XA1)).bit3)
#define	FROMADR2	((*((__RAM struct specialRegister *)0XA1)).bit2)
#define	FROMADR1	((*((__RAM struct specialRegister *)0XA1)).bit1)
#define	FROMADR0	((*((__RAM struct specialRegister *)0XA1)).bit0)
#define	ROMDAH	(*((__RAM unsigned int*)0XA2))
#define	FROMDA15	((*((__RAM struct specialRegister *)0XA2)).bit7)
#define	FROMDA14	((*((__RAM struct specialRegister *)0XA2)).bit6)
#define	FROMDA13	((*((__RAM struct specialRegister *)0XA2)).bit5)
#define	FROMDA12	((*((__RAM struct specialRegister *)0XA2)).bit4)
#define	FROMDA11	((*((__RAM struct specialRegister *)0XA2)).bit3)
#define	FROMDA10	((*((__RAM struct specialRegister *)0XA2)).bit2)
#define	FROMDA9	((*((__RAM struct specialRegister *)0XA2)).bit1)
#define	FROMDA8	((*((__RAM struct specialRegister *)0XA2)).bit0)
#define	ROMDAL	(*((__RAM unsigned int*)0XA3))
#define	FROMDA7	((*((__RAM struct specialRegister *)0XA3)).bit7)
#define	FROMDA6	((*((__RAM struct specialRegister *)0XA3)).bit6)
#define	FROMDA5	((*((__RAM struct specialRegister *)0XA3)).bit5)
#define	FROMDA4	((*((__RAM struct specialRegister *)0XA3)).bit4)
#define	FROMDA3	((*((__RAM struct specialRegister *)0XA3)).bit3)
#define	FROMDA2	((*((__RAM struct specialRegister *)0XA3)).bit2)
#define	FROMDA1	((*((__RAM struct specialRegister *)0XA3)).bit1)
#define	FROMDA0	((*((__RAM struct specialRegister *)0XA3)).bit0)
#define	ROMCNT	(*((__RAM unsigned int*)0XA4))
#define	ROMCNT1	((*((__RAM struct specialRegister *)0XA4)).bit1)
#define	ROMCNT0	((*((__RAM struct specialRegister *)0XA4)).bit0)
#define	P0M	(*((__RAM unsigned int*)0xB8))
#define	FP07M	((*((__RAM struct specialRegister *)0xB8)).bit7)
#define	FP06M	((*((__RAM struct specialRegister *)0xB8)).bit6)
#define	FP05M	((*((__RAM struct specialRegister *)0xB8)).bit5)
#define	FP04M	((*((__RAM struct specialRegister *)0xB8)).bit4)
#define	FP03M	((*((__RAM struct specialRegister *)0xB8)).bit3)
#define	FP02M	((*((__RAM struct specialRegister *)0xB8)).bit2)
#define	FP01M	((*((__RAM struct specialRegister *)0xB8)).bit1)
#define	FP00M	((*((__RAM struct specialRegister *)0xB8)).bit0)
#define	PEDGE	(*((__RAM unsigned int*)0xBF))
#define	FP01G1	((*((__RAM struct specialRegister *)0xBF)).bit3)
#define	FP01G0	((*((__RAM struct specialRegister *)0xBF)).bit2)
#define	FP00G1	((*((__RAM struct specialRegister *)0xBF)).bit1)
#define	FP00G0	((*((__RAM struct specialRegister *)0xBF)).bit0)
#define	P1W	(*((__RAM unsigned int*)0xC0))
#define	FP14W	((*((__RAM struct specialRegister *)0xC0)).bit4)
#define	FP13W	((*((__RAM struct specialRegister *)0xC0)).bit3)
#define	FP12W	((*((__RAM struct specialRegister *)0xC0)).bit2)
#define	FP11W	((*((__RAM struct specialRegister *)0xC0)).bit1)
#define	FP10W	((*((__RAM struct specialRegister *)0xC0)).bit0)
#define	P1M	(*((__RAM unsigned int*)0xC1))
#define	FP14M	((*((__RAM struct specialRegister *)0xC1)).bit4)
#define	FP13M	((*((__RAM struct specialRegister *)0xC1)).bit3)
#define	FP12M	((*((__RAM struct specialRegister *)0xC1)).bit2)
#define	FP11M	((*((__RAM struct specialRegister *)0xC1)).bit1)
#define	FP10M	((*((__RAM struct specialRegister *)0xC1)).bit0)
#define	P2M	(*((__RAM unsigned int*)0xC2))
#define	FP21M	((*((__RAM struct specialRegister *)0xC2)).bit1)
#define	FP20M	((*((__RAM struct specialRegister *)0xC2)).bit0)
#define	P5M	(*((__RAM unsigned int*)0xC5))
#define	FP54M	((*((__RAM struct specialRegister *)0xC5)).bit4)
#define	FP53M	((*((__RAM struct specialRegister *)0xC5)).bit3)
#define	FP52M	((*((__RAM struct specialRegister *)0xC5)).bit2)
#define	FP51M	((*((__RAM struct specialRegister *)0xC5)).bit1)
#define	FP50M	((*((__RAM struct specialRegister *)0xC5)).bit0)
#define	INTRQ	(*((__RAM unsigned int*)0xc8))
#define	FADCIRQ	((*((__RAM struct specialRegister *)0xc8)).bit7)
#define	FTC1IRQ	((*((__RAM struct specialRegister *)0xc8)).bit6)
#define	FTC0IRQ	((*((__RAM struct specialRegister *)0xc8)).bit5)
#define	FT0IRQ	((*((__RAM struct specialRegister *)0xc8)).bit4)
#define	FP01IRQ	((*((__RAM struct specialRegister *)0xc8)).bit1)
#define	FP00IRQ	((*((__RAM struct specialRegister *)0xc8)).bit0)
#define	INTEN	(*((__RAM unsigned int*)0xc9))
#define	FADCIEN	((*((__RAM struct specialRegister *)0xc9)).bit7)
#define	FTC1IEN	((*((__RAM struct specialRegister *)0xc9)).bit6)
#define	FTC0IEN	((*((__RAM struct specialRegister *)0xc9)).bit5)
#define	FT0IEN	((*((__RAM struct specialRegister *)0xc9)).bit4)
#define	FP01IEN	((*((__RAM struct specialRegister *)0xc9)).bit1)
#define	FP00IEN	((*((__RAM struct specialRegister *)0xc9)).bit0)
#define	OSCM	(*((__RAM unsigned int*)0xCA))
#define	FCPUM1	((*((__RAM struct specialRegister *)0xCA)).bit4)
#define	FCPUM0	((*((__RAM struct specialRegister *)0xCA)).bit3)
#define	FCLKMD	((*((__RAM struct specialRegister *)0xCA)).bit2)
#define	FSTPHX	((*((__RAM struct specialRegister *)0xCA)).bit1)
#define	WDTR	(*((__RAM unsigned int*)0xCC))
#define	TC0R	(*((__RAM unsigned int*)0xCD))
#define	PCL	(*((__RAM unsigned int*)0xCE))
#define	PCH	(*((__RAM unsigned int*)0xCF))
#define	P0	(*((__RAM unsigned int*)0xd0))
#define	FP07	((*((__RAM struct specialRegister *)0xd0)).bit7)
#define	FP06	((*((__RAM struct specialRegister *)0xd0)).bit6)
#define	FP05	((*((__RAM struct specialRegister *)0xd0)).bit5)
#define	FP04	((*((__RAM struct specialRegister *)0xd0)).bit4)
#define	FP03	((*((__RAM struct specialRegister *)0xd0)).bit3)
#define	FP02	((*((__RAM struct specialRegister *)0xd0)).bit2)
#define	FP01	((*((__RAM struct specialRegister *)0xd0)).bit1)
#define	FP00	((*((__RAM struct specialRegister *)0xd0)).bit0)
#define	P1	(*((__RAM unsigned int*)0xD1))
#define	FP14	((*((__RAM struct specialRegister *)0xD1)).bit4)
#define	FP13	((*((__RAM struct specialRegister *)0xD1)).bit3)
#define	FP12	((*((__RAM struct specialRegister *)0xD1)).bit2)
#define	FP11	((*((__RAM struct specialRegister *)0xD1)).bit1)
#define	FP10	((*((__RAM struct specialRegister *)0xD1)).bit0)
#define	P2	(*((__RAM unsigned int*)0xD2))
#define	FP21	((*((__RAM struct specialRegister *)0xD2)).bit1)
#define	FP20	((*((__RAM struct specialRegister *)0xD2)).bit0)
#define	P5	(*((__RAM unsigned int*)0xD5))
#define	FP54	((*((__RAM struct specialRegister *)0xD5)).bit4)
#define	FP53	((*((__RAM struct specialRegister *)0xD5)).bit3)
#define	FP52	((*((__RAM struct specialRegister *)0xD5)).bit2)
#define	FP51	((*((__RAM struct specialRegister *)0xD5)).bit1)
#define	FP50	((*((__RAM struct specialRegister *)0xD5)).bit0)
#define	T0M	(*((__RAM unsigned int*)0xD8))
#define	FT0ENB	((*((__RAM struct specialRegister *)0xD8)).bit7)
#define	FT0RATE2	((*((__RAM struct specialRegister *)0xD8)).bit6)
#define	FT0RATE1	((*((__RAM struct specialRegister *)0xD8)).bit5)
#define	FT0RATE0	((*((__RAM struct specialRegister *)0xD8)).bit4)
#define	FTC1X8	((*((__RAM struct specialRegister *)0xD8)).bit3)
#define	FTC0X8	((*((__RAM struct specialRegister *)0xD8)).bit2)
#define	FTC0GN	((*((__RAM struct specialRegister *)0xD8)).bit1)
#define	FT0TB	((*((__RAM struct specialRegister *)0xD8)).bit0)
#define	T0C	(*((__RAM unsigned int*)0xD9))
#define	TC0M	(*((__RAM unsigned int*)0xDA))
#define	FTC0ENB	((*((__RAM struct specialRegister *)0xDA)).bit7)
#define	FTC0RATE2	((*((__RAM struct specialRegister *)0xDA)).bit6)
#define	FTC0RATE1	((*((__RAM struct specialRegister *)0xDA)).bit5)
#define	FTC0RATE0	((*((__RAM struct specialRegister *)0xDA)).bit4)
#define	FTC0CKS	((*((__RAM struct specialRegister *)0xDA)).bit3)
#define	FALOAD0	((*((__RAM struct specialRegister *)0xDA)).bit2)
#define	FTC0OUT	((*((__RAM struct specialRegister *)0xDA)).bit1)
#define	FPWM0OUT	((*((__RAM struct specialRegister *)0xDA)).bit0)
#define	TC0C	(*((__RAM unsigned int*)0xDB))
#define	TC1M	(*((__RAM unsigned int*)0xDC))
#define	FTC1ENB	((*((__RAM struct specialRegister *)0xDC)).bit7)
#define	FTC1RATE2	((*((__RAM struct specialRegister *)0xDC)).bit6)
#define	FTC1RATE1	((*((__RAM struct specialRegister *)0xDC)).bit5)
#define	FTC1RATE0	((*((__RAM struct specialRegister *)0xDC)).bit4)
#define	FTC1CKS	((*((__RAM struct specialRegister *)0xDC)).bit3)
#define	FALOAD1	((*((__RAM struct specialRegister *)0xDC)).bit2)
#define	FTC1OUT	((*((__RAM struct specialRegister *)0xDC)).bit1)
#define	FPWM1OUT	((*((__RAM struct specialRegister *)0xDC)).bit0)
#define	TC1C	(*((__RAM unsigned int*)0xDD))
#define	TC1R	(*((__RAM unsigned int*)0xDE))
#define	STKP	(*((__RAM unsigned int*)0xDF))
#define	FGIE	((*((__RAM struct specialRegister *)0xDF)).bit7)
#define	FSTKPB2	((*((__RAM struct specialRegister *)0xDF)).bit2)
#define	FSTKPB1	((*((__RAM struct specialRegister *)0xDF)).bit1)
#define	FSTKPB0	((*((__RAM struct specialRegister *)0xDF)).bit0)
#define	P0UR	(*((__RAM unsigned int*)0xE0))
#define	FP07R	((*((__RAM struct specialRegister *)0xE0)).bit7)
#define	FP06R	((*((__RAM struct specialRegister *)0xE0)).bit6)
#define	FP05R	((*((__RAM struct specialRegister *)0xE0)).bit5)
#define	FP04R	((*((__RAM struct specialRegister *)0xE0)).bit4)
#define	FP03R	((*((__RAM struct specialRegister *)0xE0)).bit3)
#define	FP02R	((*((__RAM struct specialRegister *)0xE0)).bit2)
#define	FP01R	((*((__RAM struct specialRegister *)0xE0)).bit1)
#define	FP00R	((*((__RAM struct specialRegister *)0xE0)).bit0)
#define	P1UR	(*((__RAM unsigned int*)0xE1))
#define	FP14R	((*((__RAM struct specialRegister *)0xE1)).bit4)
#define	FP13R	((*((__RAM struct specialRegister *)0xE1)).bit3)
#define	FP12R	((*((__RAM struct specialRegister *)0xE1)).bit2)
#define	FP11R	((*((__RAM struct specialRegister *)0xE1)).bit1)
#define	FP10R	((*((__RAM struct specialRegister *)0xE1)).bit0)
#define	P2UR	(*((__RAM unsigned int*)0xE2))
#define	FP21R	((*((__RAM struct specialRegister *)0xE2)).bit1)
#define	FP20R	((*((__RAM struct specialRegister *)0xE2)).bit0)
#define	P5UR	(*((__RAM unsigned int*)0xE5))
#define	FP54R	((*((__RAM struct specialRegister *)0xE5)).bit4)
#define	FP53R	((*((__RAM struct specialRegister *)0xE5)).bit3)
#define	FP52R	((*((__RAM struct specialRegister *)0xE5)).bit2)
#define	FP51R	((*((__RAM struct specialRegister *)0xE5)).bit1)
#define	FP50R	((*((__RAM struct specialRegister *)0xE5)).bit0)
#define	_HL	(*((__RAM unsigned int*)0xE6))
#define	_YZ	(*((__RAM unsigned int*)0xE7))
#define	STK7L	(*((__RAM unsigned int*)0xf0))
#define	STK7H	(*((__RAM unsigned int*)0xf1))
#define	STK6L	(*((__RAM unsigned int*)0xf2))
#define	STK6H	(*((__RAM unsigned int*)0xf3))
#define	STK5L	(*((__RAM unsigned int*)0xf4))
#define	STK5H	(*((__RAM unsigned int*)0xf5))
#define	STK4L	(*((__RAM unsigned int*)0xf6))
#define	STK4H	(*((__RAM unsigned int*)0xf7))
#define	STK3L	(*((__RAM unsigned int*)0xf8))
#define	STK3H	(*((__RAM unsigned int*)0xf9))
#define	STK2L	(*((__RAM unsigned int*)0xfa))
#define	STK2H	(*((__RAM unsigned int*)0xfb))
#define	STK1L	(*((__RAM unsigned int*)0xfc))
#define	STK1H	(*((__RAM unsigned int*)0xfd))
#define	STK0L	(*((__RAM unsigned int*)0xfe))
#define	STK0H	(*((__RAM unsigned int*)0xff))
#define SLEEPMODE __asm{SleepMode}
#define GREENMODE __asm{GreenMode}
#define SLOWMODE __asm{SLowMode}
#define SLOW2NORMAL __asm{Slow2Normal}
#define ROMWRTVPP __asm{RomwrtVpp}
#endif
