

sfr P0          = 0x80;
sfr SP          = 0x81;
sfr DP0L        = 0x82;
sfr DP0H        = 0x83;
sfr DP1L        = 0x84;
sfr DP1H        = 0x85;
sfr SCCON       = 0x86;
sfr PCON        = 0x87;
sfr TCON        = 0x88;
sfr TMOD        = 0x89;
sfr TL0         = 0x8a;
sfr TL1         = 0x8b;
sfr TH0         = 0x8c;
sfr TH1         = 0x8d;
sfr LVDCON      = 0x8e;
sfr RSTCON      = 0x8f;

sfr P1          = 0x90;
sfr ADCOFS      = 0x91;
sfr ADCBGP      = 0x92;
sfr ADCPC       = 0x93;
sfr ADCPDL      = 0x94;
sfr ADCPDH      = 0x95;
sfr ADCDL       = 0x96;
sfr ADCDH       = 0x97;
sfr ADCON       = 0x98;
sfr ADCFG       = 0x99;
sfr ADCHS       = 0x9A;
sfr S1CON       = 0x9B;
sfr S1CFG       = 0x9c;
sfr S1BUF       = 0x9d;
sfr S1RELL      = 0x9e;
sfr S1RELH      = 0x9f;

sfr P2          = 0xa0;
sfr I2CCON      = 0xa1;
sfr I2CDAT      = 0xa2;
sfr I2CFLG      = 0xa3;
sfr I2CCPS      = 0xa4;
sfr I2CDPS      = 0xa5;
sfr S1TPS       = 0xa6;
sfr S1RPS       = 0xa7;

sfr IE          = 0xa8;
sfr LSDAT0      = 0xa9;
sfr LSDAT1      = 0xaA;
sfr LSDAT2      = 0xaB;
sfr XSCON       = 0xad;
sfr HRCON       = 0xae;
sfr LRCON       = 0xaf;

sfr TKCON       = 0xb0;
sfr TKCFG0      = 0xb1;
sfr TKCFG1      = 0xb2;
sfr TKCFG2      = 0xb3;
sfr TKCFG3      = 0xb4;
sfr TKPSC       = 0xb5;
sfr TKMSL       = 0xb6;
sfr TKMSH       = 0xb7;

sfr IP          = 0xb8;
sfr PWCON       = 0xb9;
sfr PWM0PDIV    = 0xba;
sfr PWM0CFG     = 0xbb;
sfr PWM0DUTL    = 0xbc;
sfr PWM0DUTH    = 0xbd;
sfr PWM0DIVL   = 0xbe;
sfr PWM0DIVH   = 0xbf;

sfr WKTCON      = 0xc0;
sfr WKTSS       = 0xc1;
sfr AKCON       = 0xc2;
sfr AKDAT       = 0xc3;
sfr PWM1DUTL    = 0xc4;
sfr PWM1DUTH    = 0xc5;
sfr PWM1DIVL   = 0xc6;
sfr PWM1DIVH   = 0xc7;

sfr T2CON       = 0xc8;
sfr T2MOD       = 0xc9;
sfr T2CL        = 0xca;
sfr T2CH        = 0xcb;
sfr TL2         = 0xcc;
sfr TH2         = 0xcd;
sfr WDTCON      = 0xce;
sfr WDTFLG      = 0xcf;

sfr PSW         = 0xd0;
sfr PWM2PDIV    = 0xd2;
sfr PWM2CFG     = 0xd3;
sfr PWM2DUT     = 0xd4;
sfr PWM2DIV     = 0xd6;

sfr PWMEN       = 0xd8;
sfr PWMIE       = 0xd9;
sfr PWMFLG      = 0xda;
sfr PWM3DUT     = 0xdc;
sfr PWM3DIV     = 0xde;

sfr ACC         = 0xe0;
sfr IT0CON      = 0xe1;
sfr IT1CON      = 0xe2;
sfr PWM4CFG     = 0xe3;
sfr PWM4DUTL    = 0xe4;
sfr PWM4DUTH    = 0xe5;
sfr PWM4DIVL    = 0xe6;
sfr PWM4DIVH    = 0xe7;

sfr SPCON       = 0xe8;
sfr SPDAT       = 0xe9;
sfr SPFLG       = 0xea;

sfr PWM5DUTL    = 0xec;
sfr PWM5DUTH    = 0xed;
sfr PWM5DIVL    = 0xee;
sfr PWM5DIVH    = 0xef;

sfr B           = 0xf0;
sfr LSCON       = 0xf1;
sfr LSCFG       = 0xf2;
sfr LSDTML      = 0xf3;
sfr LSDTMH      = 0xf4;
sfr LSPTML      = 0xf5;
sfr LSPTMH      = 0xf6;
sfr LSCOM       = 0xf7;

sfr LEDBTC      = 0xf9;
sfr LEDAT0    	= 0xfa;
sfr LEDAT1      = 0xfb;
sfr IDLF        = 0xfe;
sfr STPF				= 0xff;

#define P00F       (*(unsigned char volatile xdata *)0x8000)
#define P01F       (*(unsigned char volatile xdata *)0x8001)
#define P02F       (*(unsigned char volatile xdata *)0x8002)
#define P03F       (*(unsigned char volatile xdata *)0x8003)
#define P04F       (*(unsigned char volatile xdata *)0x8004)
#define P05F       (*(unsigned char volatile xdata *)0x8005)
#define P06F       (*(unsigned char volatile xdata *)0x8006)
#define P07F       (*(unsigned char volatile xdata *)0x8007)

#define P10F       (*(unsigned char volatile xdata *)0x8008)
#define P11F       (*(unsigned char volatile xdata *)0x8009)
#define P12F       (*(unsigned char volatile xdata *)0x800a)
#define P13F       (*(unsigned char volatile xdata *)0x800b)
#define P14F       (*(unsigned char volatile xdata *)0x800c)
#define P15F       (*(unsigned char volatile xdata *)0x800d)
#define P16F       (*(unsigned char volatile xdata *)0x800e)
#define P17F       (*(unsigned char volatile xdata *)0x800f)
#define P20F       (*(unsigned char volatile xdata *)0x8010)
#define P21F       (*(unsigned char volatile xdata *)0x8011)

#define FSCON      (*(unsigned char volatile xdata *)0xc000)
#define FSCMD      (*(unsigned char volatile xdata *)0xc001)
#define FSDAT      (*(unsigned char volatile xdata *)0xc003)
#define FSFLG      (*(unsigned char volatile xdata *)0xc004)
#define FSPAT      (*(unsigned char volatile xdata *)0xc005)
#define FSPTSL     (*(unsigned char volatile xdata *)0xc006)
#define FSPTSH     (*(unsigned char volatile xdata *)0xc007)
#define CKSUM0     (*(unsigned char volatile xdata *)0xc008)
#define CKSUM1     (*(unsigned char volatile xdata *)0xc009)
#define CKSUM2     (*(unsigned char volatile xdata *)0xc00a)

#define idata01     (*(unsigned char volatile idata *)0x01) 
#define idata55     (*(unsigned char volatile idata *)0x55) 
#define idata7f     (*(unsigned char volatile idata *)0x7f) 
#define idata80     (*(unsigned char volatile idata *)0x80) 
#define idatad5     (*(unsigned char volatile idata *)0xd5) 
#define idataff     (*(unsigned char volatile idata *)0xff) 
#define data80      (*(unsigned char volatile data *)0x80)  
#define datad5      (*(unsigned char volatile data *)0xd5)  
#define dataff      (*(unsigned char volatile data *)0xff)  
#define pdata00     (*(unsigned char volatile pdata *)0x00) 
#define pdata55     (*(unsigned char volatile pdata *)0x55) 
#define pdataff     (*(unsigned char volatile pdata *)0xff) 
#define xdata100    (*(unsigned char volatile xdata *)0x100)
#define xdata155    (*(unsigned char volatile xdata *)0x155)
#define xdata1ff    (*(unsigned char volatile xdata *)0x1ff)
	

sbit P00 = P0^0;	
sbit P01 = P0^1; 	
sbit P02 = P0^2;	
sbit P03 = P0^3; 	
sbit P04 = P0^4;	
sbit P05 = P0^5; 	
sbit P06 = P0^6;	
sbit P07 = P0^7; 	
  
sbit P10 = P1^0;
sbit P11 = P1^1;
sbit P12 = P1^2;
sbit P13 = P1^3;
sbit P14 = P1^4;
sbit P15 = P1^5;
sbit P16 = P1^6;
sbit P17 = P1^7;

sbit P20 = P2^0;	
sbit P21 = P2^1; 	


	
// T2CON
sbit TF2 	 = T2CON^7;		
sbit EXF2  = T2CON^6;		
sbit RCLK  = T2CON^5;		
sbit TCLK  = T2CON^4;		
sbit EXEN2 = T2CON^3;		
sbit TR2 	 = T2CON^2;		
sbit CT2 	 = T2CON^1;		
sbit CPRL2 = T2CON^0;	

// IE
sbit EA			= IE^7;		
sbit INT4 	= IE^6;		
sbit INT3	 	= IE^5;		
sbit INT2 	= IE^4;	
sbit ET1 	 	= IE^3;		
sbit INT1 	= IE^2;		
sbit ET0 	  = IE^1;	
sbit INT0 	= IE^0;		

// TCON
sbit TF1 = TCON^7; 
sbit TR1 = TCON^6;
sbit TF0 = TCON^5; 
sbit TR0 = TCON^4;
sbit IE1 = TCON^3;
sbit IT1 = TCON^2;
sbit IE0 = TCON^1;
sbit IT0 = TCON^0;
